So, you can imagine the pins of the Teensy and the internal hardware not at all connected by default. The manual states also clearly that, although technically possible with the corresponding port control settings, you never should route the same signal to more than one pin at the same time. Independent from that, you might with the same procedure set MOSI to either PTC6 or PTD2 and MISO to PTC7 or PTD3. From the table on p207 in the reference manual, you see that you might route the internal SPI clock signal either to PTC5 by choosing ALT2 for that pin or to PTD1, also by choosing ALT2. That means that you decide by setting up the port control module, which of the up to eight alternate connections of one pin to internal hardware will be activated. The K20 has an internal signal multiplexer which allows to connect different signals from the internal HW blocks to the pins. I thought I had stated clearly that you can in fact mix the pin sets, please accept my apologies if I haven't been clear on that. Thus, the SPI clock might be rerouted to PTD1 which is pin 14 without affecting the other pins. Instead shall we try and help each other rather than barbed insults? Hey I can debug the hardware myself if needed, loop back on MOSIMISO, scope on SCK, Scope on MOSI with SCK trigger, etc - but these are a hassle. What I was asking for was if anyone had practical experience. So what have we learnt here, well we can all read - lets agree on that. No one has said anything about if I can mix between the alternate pin outs for SPI0.

Mbed says nothing I can find on pin mode.

Now PJRC hasn't said much on pin mode I can see. Now little is said about how to use the alternate SPI pins, we learn from the data sheet that we need to put the pins into Alt2 mode - but thats all. Now your post does contain one useful bit of info, that the CPU only has one SPI, which is what the Data Sheet hints at (all called SPI0). The important bit is that the arm cpu has hardware SPI, and using hardware SPI is far better than bit banging the protocol. So everything written says the same (all be it the mbed source code orders differently).

Now using the schematic linked above these can be mapped to the cpu pin out (PTC5,PCT6,PTC7) or alternative (PTD1,PTD2,PTD3) - which is what I posted in my first post. īut Pauls manual, the first table says (SCK,MOSI,MISI) = (13,11,12) or the alternate (14,7,8). Read the data sheet: with the pinout (chapter 8).Įven read the Reference manual: not the full 1377 pages you understand, just chapter 45 on SPI.īut turning to the F*ing Manual, as you so politely put it. I checked the schematic: and so where the pins point. I must admit I'm developing on mbed, so I read the manual: Thanks for the link - I havn't come across that.

Spi programmer with teensy